DIMM SUMmary
Updated 21 July 2001
SDRAM 168-pin 3.3V DIMM memory has become such a cheap commodity that older types of computer memory (FPM, EDO, 30-pin, 72-pin) are economically obsolete, along with computers that don't have slots for DIMM.
DIMM memory sticks have an extra notch, so they can only be plugged in the "right" way.
Currently (July 2001) 128MB and 256MB, PC100 and PC133, are the best buys.
DIMMs have a special little SPD chip that tells the computer all about the memory and lets the computer automatically configure to use the memory properly. If you mix memory, the computer should be able to work it all out and use them in a "lowest common denominator" way, but it is simplest if you use matching memory. (Utility programs to examine DIMM parameter details are available online: simple DIMM_ID (DOS) from Vanguard in UK, and big fancy SiSoft Sandra (Win98)).
The main speeds are PC66 (slowest), PC100, and PC133 (fastest), depending on the Front Side Bus speed of the mainboard. You can use faster memory in a slower socket (it just runs at the slower speed). PC66 memory is rather obsolete now, and may actually cost more, so it would be better to buy the faster memory in general.
At each FSB speed, there is a faster version (CL2, CAS Latency = 2 cycles) and a slower version (CL3, CAS Latency = 3 cycles). This information may not be available when you buy the memory. If you put the slow CL3 version of a fast PC133 part in a slower PC100 or PC66 socket, it will usually work fine, but it might run with the slower CL3 timing, or speed up to the faster CL2 timing. It doesn't make a lot of difference!
If you put in a memory stick that has too much memory for a particular computer, it may well be able to at least use part of it. This is good to know because the smaller memories are getting hard to buy, and relatively more expensive.
It is very hard to know how much memory can be put in a particular machine. Even if you research online, the data you find may be incorrect. The only way to be sure is to try various combinations. Sometimes upgrading the BIOS may help. Sometimes using a memory module with chips on both sides (2 banks) may help - or not!
The L2 cache may not be able to handle the full range of main memory - some mainboards can only cache the first 64M. The program CTCM16N can test for this.
Lots of memory allows the use of multiple large application programs, with many screens all open at once, and is especially good for page layout and graphics work. But it is hard to get Windows to use a large amount of memory optimally. It wants to go on using hard disk swap space, even if it does not have to. It might also be nice to be able to increase the memory buffer space allocated for hard drive accesses ...
128MB is plenty for most uses on older computers running Windows 95 and 98, and costs about $30. Each new version of Windows needs more memory, but Windows may have problems accessing more than 512MB, so it would be safer not to go over that total.
There are a number of programs available the test in great detail the speed of both cache and main memory, such as CACHECHK and MEMSPEED. These are good for comparing the speeds of different computers. However, it is very difficult to get complete technical information about DIMM timing, to be able to understand *why* a particular memory runs at a particular speed in a particular computer.
Your chipset enables many of the devices in your computer (processor, memory, keyboard, mouse, etc.) to communicate with one another. Unlike processors and memory, chipsets are an integral part of a motherboard and generally cannot be upgraded.
Accepts PC133 SDRAM
This line tells you whether or not your system will accept PC133 synchronous dynamic random access memory (SDRAM). SDRAM
delivers bursts of data at very high speeds using an interface that is synchronized to the CPU clock. PC133 SDRAM meets Intel's
requirements for use with 133MHz motherboards. In general, PC133 SDRAM can also be used with a 100MHz or 66MHz front side bus;
however, your memory will only operate as fast as the slowest "link" in your system. For example, if you install a PC133 module in a
system with a 100MHz FSB or in a system containing a 100MHz module, the PC133 module will operate at 100MHz.
Accepts SDRAM 100MHZ
This line tells you whether or not your system will accept 100MHz synchronous dynamic random access memory (SDRAM). SDRAM
delivers bursts of data at very high speeds using an interface that is synchronized to the CPU clock. PC100 SDRAM is a particular type
of 100MHz SDRAM that meets Intel's requirements for use with 100MHz motherboards. In general, 100MHz SDRAM can also be used
with a 66MHz front side bus; however, your memory will only operate as fast as the slowest "link" in your system. For example, if you
install a PC100 module in a system with a 66MHz FSB or in a system containing a 66MHz module, the PC100 module will operate at
66MHz.
Accepts SDRAM 66MHZ
This line tells you whether or not your system will accept 66MHz synchronous dynamic random access memory (SDRAM). SDRAM
delivers bursts of data at very high speeds using an interface that is synchronized to the CPU clock. 66MHz SDRAM is used in systems
that have a 66MHz front side bus.
Accepts Registered SDRAM
This line tells you whether or not your system will accept registered SDRAM. Registered modules contain a register that delays all
information transferred to the module by one clock cycle. Like buffered modules, registered modules are typically used only in servers
and other mission-critical systems where it is extremely important that the data is properly handled.
Accepts EDO
This line tells you whether or not your system will accept extended data out (EDO) memory. Enhancements in its addressing system
allow EDO to operate 10 to 15% faster than FPM; however, it is not as fast as SDRAM.
Accepts Fast Page Mode
This line tells you whether or not your system will accept fast page mode (FPM) memory. FPM is the oldest type of memory that Crucial
sells. In the FPM scheme, information from the same row of DRAM can be accessed an infinite number of times after supplying the row
address only once.
Max EDO/FPM
This line tells you the maximum amount of EDO or FPM memory (in megabytes) that your motherboard will recognize. The total memory
on all the modules installed in your system cannot exceed this amount.
Accepts DDR
This line tells you whether or not your system will accept double data rate (DDR) SDRAM. DDR SDRAM is the most recent addition to
Crucial Technology's memory offerings. It reads information on both the rising and falling edge of the CPU's clock cycle, roughly
doubling the speed of memory processing over standard SDRAM. PC1600 DDR SDRAM is used in systems with a 100MHz front side
bus. PC2100 DDR SDRAM is used in systems with a 133MHz front side bus.
Accepts ECC
This line tells you if your motherboard will accept error checking and correcting (ECC) modules. ECC modules have an extra chip that
detects if the data was correctly read or written by the memory module. If the data wasn't properly written, the extra chip will correct it in
many cases (depending on the type of error). Non-ECC (also called non-parity) modules do not have this error-detecting feature. If you
plan to use your system as a server or a similar mission-critical type machine, it is to your advantage to use ECC. If you plan to use your
PC for regular home, office, or gaming applications, you are better off with non-ECC. Current technology DRAM is very stable and
memory errors are rare, so unless you have a need for ECC, you are better served with non-ECC SDRAM or DDR SDRAM.
Accepts Parity
This line tells you if your motherboard will accept parity modules. Parity modules have an extra chip that detects if data was correctly
read or written by the memory module, depending on the type of error. However, unlike an ECC module, a parity module will not correct
the error. If you plan to use your system as a server or a similar mission critical type machine, it is to your advantage to use parity. If you
plan to use your PC for regular home, office, or gaming applications, you are better off with non-parity. Current technology DRAM is
very stable and memory errors are rare, so unless you have a need for parity, you are better served with non-parity DRAM.
Accepts RDRAM (Rambus)
This line tells you if your motherboard will accept Rambus (RDRAM) memory. Rambus is a proprietary memory of Rambus Inc., and
manufacturers who produce it are required to pay a royalty. Rambus and SDRAM modules are not interchangeable and do not fit into the
same size slots.
DIMM Socket Count
This line tells you how many dual inline memory modules (DIMMs) can be installed in your system at once. A DIMM consists of a
number of memory components (usually black) that are attached to a printed circuit board (usually green). The gold or tin pins on the
bottom of the DIMM provide a connection between the module and a socket on a larger printed circuit board. The pins on the front and
back of a DIMM are not connected, providing two lines of communication paths between the module and the system. DIMMs come in
several sizes. 168-pin DIMMs, the most common size for PCs, are approximately 5.375" long and 1.375" high. 100-pin DIMMs, the most
common size for printers, are approximately 3.5" long and 1.25" high. 184-pin DIMMs, used for DDR SDRAM, are approximately 5.375"
long and 1.375" high. While 184-pin DIMMs and 168-pin DIMMs are about the same size, 184-pin DIMMs have only one notch within
the row of pins while the 168-pin DIMMs have two notches.
Sockets per DIMM Bank
This line tells you how many DIMMs must be installed at the same time. In most cases, DIMMs are installed individually. However, if
there were two sockets per bank, you would need to install two modules at the same time. In this scenario, if you wanted to add 64MB,
you would need to purchase two 32MB modules and install them together.
72-pin SIMM Socket Count
This line tells you how many 72-pin single inline memory modules (SIMMs) can be installed in your system. A SIMM consists of a
number of memory components (usually black) that are attached to a printed circuit board (usually green). The gold or tin pins on the
bottom of the SIMM provide a connection between the module and a socket on a larger printed circuit board. The pins on the front and
back of a SIMM are connected, providing a single line of communication paths between the module and the system. Each 72-pin SIMM
provides a 32-bit data path, so they can be installed singly in 32-bit systems (486 models) but must be installed in pairs in 64-bit systems
(Pentium and Athlon models). 72-pin SIMMs are approximately 4.25" long and 1" high, though the heights may vary. They have one
notch on the bottom left and one notch in the center of the module.
Sockets per 72-pin SIMM Bank
This line tells you how many 72-pin SIMMs must be installed at the same time in your system. In general, they can be installed singly in
32-bit systems (486 models) but must be installed in pairs in 64-bit systems (Pentium and Athlon models). If you have two sockets per
bank, you would need to install two modules at the same time. In this scenario, if you wanted to add 64MB, you would need to purchase
two 32MB modules and install them together.
30-pin SIMM Socket Count
This line tells you how many 30-pin single inline memory modules (SIMMs) can be installed in your system. A SIMM consists of a
number of memory components (usually black) that are attached to a printed circuit board (usually green). The gold or tin pins on the
bottom of the SIMM provide a connection between the module and a socket on a larger printed circuit board. The pins on the front and
back of a SIMM are connected, providing a single line of communication paths between the module and the system. Each 30-pin SIMM
provides an 8-bit data path, so they must be installed in banks of 4 in order to communicate with 32-bit systems (such as 486 models). All
30-pin SIMMs use FPM memory technology. 30-pin SIMMs are approximately 3.5" long and .75" high, though the heights may vary.
They have a single notch on the bottom left to ensure that they are installed correctly.
Sockets per 30-pin SIMM Bank
This line tells you how many 30-pin SIMMs must be installed at the same time in your system. In general, 30-pin SIMMs are installed in
banks of 4. That means that if you wanted to add 64MB, you would need to purchase four 16MB modules and install them together.
Buffering
This line tells you whether your system takes buffered, unbuffered, or registered modules. Unbuffered modules are the most common. In
unbuffered memory, the chipset controller deals directly with the memory. There is nothing between the chipset and the memory as they
communicate. Buffered modules contain a buffer to help the chipset cope with the large electrical load required when the system has a lot
of memory. Registered modules are unbuffered modules that contain a register that delays all information transferred to the module by
one clock cycle. Buffered and registered modules are typically used only in servers and other mission-critical systems where it is
extremely important that the data is properly handled. DDR and SDRAM modules can be registered or unbuffered; EDO and FPM
modules can be buffered or unbuffered.
Max Unbuffered SDRAM
This line tells you the maximum amount of unbuffered memory (in megabytes) that your motherboard will recognize. The total of all the
modules installed in your system cannot exceed this amount. In unbuffered SDRAM, the chipset controller deals directly with the
memory. There is nothing between the chipset and the memory as they communicate.
Max Registered SDRAM
This line tells you the maximum amount of registered memory (in megabytes) that your motherboard will recognize. The total of all the
modules installed in your system cannot exceed this amount. Registered modules contain a register that delays all information transferred
to the module by one clock cycle. is usually done on modules with a lot of memory to help ensure that the data is properly handled.
CL=3, CL=2, and CL=2, 2-clock
In our Memory Selector, the CAS latency of our parts is designated with "CL=3," "CL=2," or "CL=2, 2-clock." (You may see this written
elsewhere as "CL2, etc." or "CAS=2, CAS=3, etc.") CAS latency is the amount of time it takes for your memory to respond to a command.
It only affects the initial burst of data. Once data starts flowing, latency has no effect. Latency is measured in terms of clock cycles. For
example, a CL=2 part requires two clock cycles to respond, while a CL=3 part requires three clock cycles. Thus, CL=2 parts complete the
initial data access a little more quickly than CL=3 parts. However, a clock cycle for a systems with a 100MHz front side bus is only 10
nanoseconds (10 billionths of a second), so you probably won't be able to tell the difference between a CL=2 and a CL=3 part. Most
systems will accept either part; however, some systems require one or the other. These requirements are built into our Memory Selector.
The first important timing symbol to consider is tCLK, which is the system clock speed. If your CPU is running at 233 MHz (3.5x66MHz), then your system clock is running at 66 million cycles per second. This equates to about 15 ns for tCLK. (The clock cycle length in nanoseconds is calculated simply by taking the reciprocal of the clock speed; 1 divided by 66.6 million cycles per seond = 15 x 10-9 seconds per cycle, or 15 nanoseconds per clock cycle). In other words, each clock cycle takes 15 ns to complete.
The term "Synchronous" in SDRAM means that every operation in the chip happens in sync with the system clock; therefore any operation that takes 15 ns or less to complete can occur every clock cycle (at 66MHz), but any operation that takes between 16ns and 30ns requires two clock cycles. Note that a 100MHz system clock speed, such as that found on the latest systems running at 350+ MHz, is equivalent to a 10ns clock cycle. This of course means that in order for the SDRAM to complete its activities within one clock cycle, at 100 MHz, everything must happen much faster than it does at 66 MHz.
Now let's look at the timings of the memory itself. For SDRAM, there are 5 important timings:
Each timing factor will play a role in determining the overall performance in any system. Of the five, two are most commonly referenced in marketing and sales literature: read cycle time and tCAC, though you will rarely, if ever, see them called that. Another important timing is the "access time" or tAC.
It's important to note that when you see an SDRAM chip referred to as either "10 ns" or "8 ns", what is really being measured is the "read cycle time". Note that this is not measuring the same timing that EDO or FPM was when they were specified as 60 ns or 70 ns. For the older (asynchronous) DRAM, the timings given were the total amount of time required for a complete memory access (row access, column access and output). In the case of SDRAM, it is the amount of time required to perform a read operation after the initial read (burst mode) that is being given.
The reason this issue of the speed rating is important, is that the PC100 SDRAM spec requires a maximum of 8ns burst cycle time. This does not mean that a chip marked as 10ns will not actually operate at 8 ns (just as a 60 ns EDO chip may actually operate at 50 ns or faster); it just means that there is no guarantee it will operate faster than 10ns in burst mode, which may not be sufficient for use in a 100 MHz system.
Access time (tAC) is the amount of time it takes to "open" the output line from the prior clock "tick". A control line triggers action by a change in state, which is called a "rising edge" (transition from "0" to "1") or "falling edge" (transition from "1" to "0"). When the line "drops", an operation is signaled to begin; however, there is a period of time that must pass before the signal stabilizes. In order to be able to send data out every 10 ns, this time between the last system clock "tick" (rising edge) and the beginning of the output signal must be fast enough to allow the signal to stabilize before beginning the actual output operation. For the PC100 spec, this time is specified as 6 ns.
Another common marketing term attached to SDRAM modules is either "CAS2" or "CAS3". Unfortunately, this is a misnomer; these should be called CL2 or CL3, since they refer to CAS Latency timings (2 clocks vs. 3 clocks). The CAS Latency of a chip is determined by the column access time (tCAC). This is the time it takes to transfer the data to the output buffers from the time the /CAS line is activated.
The "rule" for determining CAS Latency timing is based on this equation: CL * tCLK >= tCAC
In English: "CAS Latency times the system clock cycle length must be greater than or equal to the column access time". In other words, if tCLK is 10ns (100 MHz system clock) and tCAC is 20ns, the CL can be 2. But if tCAC is 25ns, then CL must be 3. The SDRAM spec only allows for CAS Latency values of 1, 2 or 3.
OK, now let's put this all together: first the CPU activates the row and bank via the /RAS line. After a period of time (tRCD), the /CAS line is activated. When the amount of time required for column access (tCAC) has passed, the data appears on the output line and can be transferred on the next clock cycle. The time that has passed is approximately 50 ns for the first piece of data to become available. Subsequent transfers may be performed via burst mode (every clock cycle), or by cycling /CAS if necessary (which requires an amount of time dictated by tCAC, also called the CAS Latency period). For burst mode operation, the access time (tAC) must be 6ns, so that the signal can stabilize and an output operation can begin by 8 ns after the last one. The transfer of the data takes 2 ns or less, which means that the data is available every 10 ns on a burst transfer--just in time for the next 100 MHz clock signal!